MASH ΣΔ modulators with a noise-shaped two-step ADC in the second stage

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• 作者：Mohsen Shahghasemi ; Mohammad Yavari ; ^{myavari@aut.ac.ir}
• 关键词：MASH ΣΔ modulators ; Noise-shaped two-step ADCs ; Switched-capacitor circuits ; Operational transconductance amplifiers
• 刊名：Integration, the VLSI Journal
• 出版年：2017
• 出版时间：January 2017
• 年：2017
• 卷：56
• 期：Complete
• 页码：77-85
• 全文大小：1672 K
• 卷排序：56

文摘

In this paper, a multi-stage noise-shaping (MASH) sigma-delta (ΣΔ) modulator is proposed to be used in low oversampling ratio (OSR) applications. It utilizes a noise-shaped two-step (NSTS) analog-to-digital converter (ADC) in the second stage and benefits its inter-stage gain to provide an extra attenuation of the quantization noise such that the same specifications of a traditional modulator are achieved but with a lower order of noise-shaping. Furthermore, large number of bits is resolved in the second stage while equal number of comparators is used. Compared to the single-loop NSTS ADC, in the proposed structure, the complexity problem of the feedback path and coefficient spreading are eliminated. As an example, a MASH 2-1 sigma-delta modulator has been designed and simulated in a 90 nm CMOS process using Spectre. The achieved resolution is 13.44 effective number of bits in 6.25 MHz signal bandwidth while consuming 19.6 mW power from a single 1 V supply. The sampling frequency is 100 MHz and the simulated figure of merit is 141 fJ/conv-step which shows the efficiency of the proposed modulator.