Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits

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• 作者：Hossam Sarhan ; ^{hossam.sarhan@gmail.com} ; Sebastien Thuries ; Olivier Billoint ; Fabien Clermidy
• 关键词：High-density 3D integrated circuits ; Monolithic 3D ; CoolCube ; 3DVLSI ; Cell-on-Buffer
• 刊名：Microelectronics Journal
• 出版年：2017
• 出版时间：February 2017
• 年：2017
• 卷：60
• 期：Complete
• 页码：109-118
• 全文大小：1510 K
• 卷排序：60

文摘

Monolithic 3D Integration technology (M3D) provides high density vertical interconnects allowing new design approaches such as Cell-on-Cell (gate level approach) and NMOS-on-PMOS (transistor level approach). This work proposes a 3D Cell-on-Buffer (3DCoB) design approach by separating the logical functioning stage of a gate from its driving stage, then vertically stacking them. The proposed 3DCoB approach demonstrates better performances compared to the 2D implementation and the conventional 3D approaches. A Multi-VDD low-power technique is applied to 3DCoB cells (i.e. a different power supply for each tier). The multi-VDD 3DCoB technique provides total power reduction with limited performances degradation compared to the single-VDD 3DCoB approach. 3DCoB with single- and Multi- VDD techniques are applied on a set of benchmark designs in 28 nm-FDSOI technology using conventional sign-off place and route flow. Implementation results show up to 35% increment in performance and up to 21.8% reduction in the total power compared to 2D designs.