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A low energy ASIC for triple-chamber cardiac pacemakers with contact resistance measurement
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文摘
A mixed-signal application specific integrated circuit (ASIC) is presented for triple-chamber pacemakers. To save power, a programmable stimulator composed of a 5-bit low-voltage digital-to-analog converter (DAC) and a triple-mode voltage multiplier is introduced to lower the capacitive load of the charge pump, thus reduces the charge pump driving clock frequency to 100 Hz leading to significant reduction in dynamic power. According to refractory periods of the heart, a low-power control strategy is adopted in the sensing channel, in which the opamp is turned on by a sensing command and turned off automatically by a valid sensing event to reduce the average power consumption. Contact resistance measurement function based on bidirectional current injection is also integrated in the ASIC to reflect the connection status and pathological status of the patient's heart. The ASIC is fabricated in a 0.35-μm Bipolar-CMOS-DMOS (BCD) process with a chip area of 3.8 mm×3.8 mm. Measurement results show that the magnitude of the stimulus pulse can be programmed from 0.1 to 7.5 V with 0.1-V step. Almost linear heart resistance measuring is achieved in the resistance range of 250–4000 Ω. The average current consumption is 4 μA under typical pacing algorithms from a 2.8-V power supply.

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