A capacitorless low-dropout regulator with enhanced slew rate and 4.5- \(\upmu \hbox {A}\) quiescent current

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• 作者：Jaejin Yeo ; Khurram Javed ; Jaeseong Lee…
• 关键词：Voltage regulator ; Low ; dropout regulator ; High slew rate
• 刊名：Analog Integrated Circuits and Signal Processing
• 出版年：2017
• 出版时间：January 2017
• 年：2017
• 卷：90
• 期：1
• 页码：227-235
• 全文大小：
• 刊物类别：Engineering
• 刊物主题：Circuits and Systems; Electrical Engineering; Signal,Image and Speech Processing;
• 出版者：Springer US
• ISSN：1573-1979
• 卷排序：90

文摘

In this paper, an output-capacitorless, low-dropout (LDO) voltage regulator with excellent load regulation and fast recovery time was designed using two amplifiers, which provided high gain, high bandwidth (HBW), and high slew rate (HSR). In addition, a one-shot current boosting (OSCB) circuit was added for current control to charge and discharge the parasitic capacitance at the power transistor gate during the load-current transition to improve the response time. The experimental results show that the proposed LDO regulator consumes a quiescent current of only 4.5 \(\upmu \hbox {A}\) and can deliver a maximum load current of 200 mA, while regulating the output voltage at \({\text {1\,V}}\) with a 1.2 V power supply. We experimentally verified that for a current transition from 0.1 to 200 mA, the undershoot and overshoot voltages were 260 and \({\text {190\,mV}}\), with recovery times of only 0.8 and 0.85 \({\upmu }\hbox {s}\), respectively.