The interfaces of lanthanum oxide-based subnanometer EOT gate dielectrics

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• 作者：Hei Wong (10) (11)
  Jian Zhou (10)
  Jieqiong Zhang (11)
  Hao Jin (10)
  Kuniyuki Kakushima (12)
  Hiroshi Iwai (12)
  
  10. Department of Electronic Engineering and Information Sciences ; Zhejiang University ; Hangzhou ; China
  11. Department of Electronic Engineering ; City University of Hong Kong ; Tat Chee Avenue ; Kowloon ; Hong Kong
  12. Frontier Research Center ; Tokyo Institute of Technology ; Yokohama ; 226-8502 ; Japan
  
• 关键词：High ; k ; Lanthanum oxide ; Si/high ; k interface ; Metal gate/high ; k interface
• 刊名：Nanoscale Research Letters
• 出版年：2014
• 出版时间：December 2014
• 年：2014
• 卷：9
• 期：1
• 全文大小：779 KB
• 参考文献：1. Wong, H, Zhang, J (2014) Challenges of next generation ultrathin gate dielectrics. Proc IEEE Int Symp Next Generation Electronics; Taoyuan. IEEE Press, Piscataway
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  5. Yamada, H, Shimizu, T, Suzuki, E (2002) Interface reaction of a silicon substrate and lanthanum oxide films deposited by metalorganic chemical vapor deposition. Jpn J App Phys 41: pp. L368-370 CrossRef
  6. Wong, H, Ng, KL, Zhan, N, Poon, MC, Kok, CW (2004) Interface bonding structure of hafnium oxide prepared by direct sputtering of hafnium in oxygen. J Vac Sci Technol B 22: pp. 1094-1100 CrossRef
  7. Lucovsky, G Bond strain and defects at Si-SiO2 and dielectric interfaces in high-k gate stacks. In: Iwai, H, Nishi, Y, Shur, MS, Wong, H eds. (2006) Frontiers in Electronics. World Scientific, Singapore, pp. 241-262
  8. Lucovsky, G (2003) Electronic structure of transition metal/rare earth alternative high-k gate dielectrics: interfacial band alignments and intrinsic defects. Microeletron Reliab 43: pp. 1417-1426 CrossRef
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  10. Fitch, JT, Bjorkman, CH, Lucovsky, G, Pollak, FH, Yim, X (1989) Intrinsic stress and stress gradients at the SiO2/Si interface in structures prepared by thermal oxidation of Si and subjected to rapid thermal annealing. J Vac Sci Technol B 7: pp. 775-781 CrossRef
  11. Lucovsky, G, Yang, H, Niimi, H, Keister, JW, Rowe, JE, Thorpe, MF, Phillips, JC (2000) Intrinsic limitations on device performance and reliability from bond-constraint induced transition regions at interfaces of stacked dielectrics. J Vac Sci Technol B 18: pp. 1742-1748 CrossRef
  12. Wong, H, Iwai, H (2006) Modeling and characterization of direct tunneling current in dual-layer ultrathin gate dielectric films. J Vac Sci Technol B 24: pp. 1785-1793 CrossRef
  13. Wong, H, Iwai, H, Kakushima, K, Yang, BL, Chu, PK (2010) XPS study of the bonding properties of lanthanum oxide/silicon interface with a trace amount of nitrogen incorporation. J Electrochem Soc 157: pp. G49-G52 CrossRef
  14. Kawanago, T (2011) A study on high-k/metal gate stack MOSFETs with rare earth oxides. Ph.D. Dissertation. Tokyo Institute of Technology, Japan
  15. Wong, H, Sen, B, Yang, BL, Huang, AP, Chu, PK (2007) Effects and mechanisms of nitrogen incorporation in hafnium oxide by plasma immersion implantation. J Vac Sci Technol B 25: pp. 1853-1858 CrossRef
  16. Wong, H, Yang, BL, Kakushima, K, Ahmet, P, Iwai, H (2012) Effects of aluminum doping on lanthanum oxide gate dielectric films. Vacuum 86: pp. 929-932 CrossRef
  17. Sen, B, Wong, H, Molina, J, Iwai, H, Ng, JA, Kakushima, K, Sarkar, CK (2007) Trapping characteristics of lanthanum oxide gate dielectric film explored from temperature dependent current-voltage and capacitance-voltage measurements. Solid State Electron 51: pp. 475-480 CrossRef
  18. Perevalov, TV, Gritsenko, VA, Erenburg, SB, Badalyan, AM, Wong, H, Kim, CW (2007) Atomic and electronic structure of amorphous and crystalline hafnium oxide: x-ray photoelectron spectroscopy and density functional calculations. J Appl Phys 101: pp. 053704 CrossRef
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• 刊物主题：Nanotechnology; Nanotechnology and Microengineering; Nanoscale Science and Technology; Nanochemistry; Molecular Medicine;
• 出版者：Springer US
• ISSN：1556-276X

文摘

When pushing the gate dielectric thickness of metal-oxide-semiconductor (MOS) devices down to the subnanometer scale, the most challenging issue is the interface. The interfacial transition layers between the high-k dielectric/Si and between the high-k dielectric/gate metal become the critical constraints for the smallest achievable film thickness. This work presents a detailed study on the interface bonding structures of the tungsten/lanthanum oxide/silicon (W/La2O3/Si) MOS structure. We found that both W/La2O3 and La2O3/Si are thermally unstable. Thermal annealing can lead to W oxidation and the forming of a complex oxide layer at the W/La2O3 interface. For the La2O3/Si interface, thermal annealing leads to a thick low-k silicate layer. These interface layers do not only cause significant device performance degradation, but also impose a limit on the thinnest equivalent oxide thickness (EOT) to be achievable which may be well above the requirements of our future technology nodes.