作者单位:A. Modic (1) Y.K. Sharma (1) Y. Xu (2) G. Liu (2) A.C. Ahyi (1) J.R. Williams (1) L.C. Feldman (2) S. Dhar (1)
1. Allison Laboratory, Physics Department, Auburn University, Auburn, AL, 36849, USA 2. Institute for Advanced Materials, Devices and Nanotechnology, Rutgers University, Piscataway, NJ, 08854, USA
ISSN:1543-186X
文摘
A nitrogen plasma annealing process for gate dielectric applications in 4H-SiC metal oxide semiconductor (MOS) technology has been investigated. This process results in substantially greater interfacial N coverage at the SiO2/4H-SiC interface and lower interface trap densities than the state-of-the-art nitric oxide (NO) annealing process. Despite these exciting results, the field-effect mobility of MOS field-effect transistors (MOSFETs) fabricated by use of this process is very similar to that of NO-annealed MOSFETs. These results emphasize the importance of understanding mobility-limiting mechanisms in addition to charge trapping in next-generation 4H-SiC MOSFETs.