一种基于互补电路的抗DPA攻击DES方案
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摘要
功耗分析攻击是当前密码芯片中各类数据加密算法的主要安全威胁,尤其是对于迄今应用最为广泛的数据加密标准算法造成了严重的危害。通过分析数据加密标准算法遭受功耗攻击的原理,并结合针对数据加密标准算法关键防御技术,给出了一种基于互补电路的抗DPA攻击DES方案。所给方案采用双电路进行互补输出,致使寄存器翻转保持功耗恒定,能最大限度地降低功耗差异。性能分析结果表明:所给方案能抵抗差分功耗攻击,而且易于实现,可直接用于密码芯片的电路设计中。
Currently,power analysis attacks are the major security threats to the cryptographic chips with different kinds of data encryption algorithms.Especially,the data encryption standard algorithm which is the most widely used in different systems by far has suffered serious harm because of power attacks.According to the principle and the resistance countermeasures of power attacks aiming to data encryption standard algorithm,a scheme of resisting differential power attack for data encryption standard algorithm based on complementary circuit is proposed.The scheme mainly carries out the complementary output by using the double-circuit in order to ensure keeping the power consumption constant of registers in roll-in-over and to decrease the difference of power consumption farthest.Performance analysis results demonstrate that the scheme can resist differential power attacks and is easy to implement,and can be applied in the circuit design of cryptographic chips directly.
Currently,power analysis attacks are the major security threats to the cryptographic chips with different kinds of data encryption algorithms.Especially,the data encryption standard algorithm which is the most widely used in different systems by far has suffered serious harm because of power attacks.According to the principle and the resistance countermeasures of power attacks aiming to data encryption standard algorithm,a scheme of resisting differential power attack for data encryption standard algorithm based on complementary circuit is proposed.The scheme mainly carries out the complementary output by using the double-circuit in order to ensure keeping the power consumption constant of registers in roll-in-over and to decrease the difference of power consumption farthest.Performance analysis results demonstrate that the scheme can resist differential power attacks and is easy to implement,and can be applied in the circuit design of cryptographic chips directly.
引文
[1]吴筱,郭培源,何多多.DES和SM4算法的可重构研究与实现[J].计算机应用研究,2014,31(3):853-856.Wu X,Guo P Y,He D D.Implementation of Reconfigurable of DESand SM4 Encryption Algorithm[J].Application Research of Computers,2014,31(3):853-856.
[2]Kocher P,Jaffe J,Jun B.Introduction to Differential Power Analysis and Related Attacks[EB/OL].http://www.Cryptography.com/dpa/technical,1998.
[3]Tang M,Qiu Z L,Yang M,et al.Evolutionary Ciphers Against Differential Power Analysis and Differential Fault Analysis[J].Science China(Information Sciences),2012,55(11):2555-2569.
[4]王小娟,郭世泽,赵新杰,等.基于功耗预处理优化的LED密码模板攻击研究[J].通信学报,2014,35(3):157-167.Wang X J,Guo S Z,Zhao X J,et al.Research on Power Preprocessing Optimization-based Template Attack on LED[J].Journal of Communications,2014,35(3):157-167.
[5]Zafar Y,Park J,Har D,et al.Random Clocking Induced DPA Attack Immunity in FPGA[C].Proceedings of the 2010 IEEE International Conference on Industrial Technology.Piscataway:IEEE,2010:1068-1079.
[6]Yoshikawa M,Kojima Y.Efficient Random Number for the Masking Method Against DPA Attacks[C].Proceedings of the 2011 21st International Conference on Systems Engineering.Piscataway:IEEE,2011:321-324.
[7]黄颖,崔小欣,魏为,等.基于FPGA平台的电路级抗差分功耗分析研究[J].北京大学学报(自然科学版),2014,50(4):652-656.Huang Y,Cui X X,Wei W,et al.Research on DPA Resistant Circuit for FPGA[J].Acta Scientiarum Naturalium Universitatis Pekinensis,2014,50(4):652-656.
[8]Akkar M-L,Giraud C.An Implementation of DES and AES,Secure Against Some Attacks[C].CHES 2001,LNCS 2162.Berlin:Springer,2001:309-318.
[9]Standaert F-X,Rouvroy G,Quisquater J-J.FPGA Implementations of the DES and Triple-DES Masked Against Power Analysis Attacks[C].Proceedings of 2006 International Conference on Field Programmable Logic and Applications.Piscataway:IEEE,2006:1-4.
[10]Tiri K,Hwang D,Hodjat A,et al.A Side-channel Leakage Free Coprocessor IC in 0.18μm CMOS for Embedded AES-based Cryptographic and Biometric Processing[C].Proceedings of the 200542nd Design Automation Conference.Piscataway:IEEE,2005:222-227.
[2]Kocher P,Jaffe J,Jun B.Introduction to Differential Power Analysis and Related Attacks[EB/OL].http://www.Cryptography.com/dpa/technical,1998.
[3]Tang M,Qiu Z L,Yang M,et al.Evolutionary Ciphers Against Differential Power Analysis and Differential Fault Analysis[J].Science China(Information Sciences),2012,55(11):2555-2569.
[4]王小娟,郭世泽,赵新杰,等.基于功耗预处理优化的LED密码模板攻击研究[J].通信学报,2014,35(3):157-167.Wang X J,Guo S Z,Zhao X J,et al.Research on Power Preprocessing Optimization-based Template Attack on LED[J].Journal of Communications,2014,35(3):157-167.
[5]Zafar Y,Park J,Har D,et al.Random Clocking Induced DPA Attack Immunity in FPGA[C].Proceedings of the 2010 IEEE International Conference on Industrial Technology.Piscataway:IEEE,2010:1068-1079.
[6]Yoshikawa M,Kojima Y.Efficient Random Number for the Masking Method Against DPA Attacks[C].Proceedings of the 2011 21st International Conference on Systems Engineering.Piscataway:IEEE,2011:321-324.
[7]黄颖,崔小欣,魏为,等.基于FPGA平台的电路级抗差分功耗分析研究[J].北京大学学报(自然科学版),2014,50(4):652-656.Huang Y,Cui X X,Wei W,et al.Research on DPA Resistant Circuit for FPGA[J].Acta Scientiarum Naturalium Universitatis Pekinensis,2014,50(4):652-656.
[8]Akkar M-L,Giraud C.An Implementation of DES and AES,Secure Against Some Attacks[C].CHES 2001,LNCS 2162.Berlin:Springer,2001:309-318.
[9]Standaert F-X,Rouvroy G,Quisquater J-J.FPGA Implementations of the DES and Triple-DES Masked Against Power Analysis Attacks[C].Proceedings of 2006 International Conference on Field Programmable Logic and Applications.Piscataway:IEEE,2006:1-4.
[10]Tiri K,Hwang D,Hodjat A,et al.A Side-channel Leakage Free Coprocessor IC in 0.18μm CMOS for Embedded AES-based Cryptographic and Biometric Processing[C].Proceedings of the 200542nd Design Automation Conference.Piscataway:IEEE,2005:222-227.