同时具有隔离层和场板的4H-SiC MESFET特性优化研究
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摘要
碳化硅(SiC)材料由于具有大的禁带宽度、高的临界击穿电场、高的电子饱和速度以及高的热导率等性能,在高温、高功率、抗辐照等工作条件下具有明显的优势,成为近几年半导体领域研究的热点。由于SiC材料的自身属性,目前研制成功的SiC微波功率MESFET器件中普遍存在高本征表面态和界面态,使得器件在直流特性体现为输出电流大幅下降,在高频工作时总是面临着电流不稳定、电流崩塌等性能和可靠性方面的问题。目前国际国内对于器件性能的改善措施主要有隔离层和场板。隔离层用来抑制表面陷阱,场板用来提高击穿电压,两者都有非常好的效果。但是尚没有研究将上述两种结构结合起来,使得器件能够抑制表面陷阱获得高的输出电流并且可以得到高的击穿电压。
本文针对器件的表面陷阱所带来的器件性能的退化,同时把隔离层和场板同时引入器件结构,不仅达到了抑制表面陷阱的效果,并且提高了击穿电压;通过优化二者的参数,提高了器件的输出电流和击穿电压。本文首先利用二维器件仿真软件ISE-TCAD建立了4H-SiC MESFET器件的结构模型和物理模型。根据对传统4H-SiC MESFET结构的基本直流工作特性中输出特性、转移特性等特性的分析,确定了基本模型和研究方法。其次,从器件的输出特性和转移特性两方面对表面陷阱的影响进行了研究,并结合实际确定了使得器件性能退化最大的表面陷阱的密度和能级:密度为1×10~(13)cm~(-2),能级距离导带1.8eV。在此种情况下,4H-SiC MESFET漏源电流下降约120%,跨导下降约50%。第三,在上述研究基础上,对隔离层掺杂浓度、厚度和隔离层中的埋栅深度进行了优化和无陷阱的理想状态进行对比,得到优化参数:隔离层的厚度为0.1μm,掺杂浓度为1×10~(14)cm~(-3),埋栅深度为为0.05μm。在这组优化参数下进行仿真,表面陷阱效应得到有效抑制,且引入的寄生参数较小,器件的直流性能得到大幅度的提高。相对于有陷阱的传统结构,漏源电流提高约130%,跨导增益大于20mS/mm的电压工作范围提高约100%。最后,在隔离层上引入场板结构,分析其对器件的直流特性的影响。分析其对器件击穿电压提高的机理,从而说明场板与隔离层之间不存在相互的影响。经优化场板的长度,可以提高器件的击穿电压约60%。
Silicon carbide (SiC) is a very promising candidate for high temperature, high power, high frequency, and radiation hardness applications because of its superior properties such as wide band gap, high critical breakdown field, high thermal conductivity and high saturation electron drift velocity. In recent years it became a hot research field of semiconductor. As the property of SiC material, now the high intrinsic surface states and interface states are prevalent in the successfully manufactured SiC microwave power MESFET devices, making the device output current decline sharply in DC characteristics .when devices is worked at high-frequency, current Instability and current collapse is caused by surface states and interface states. At present, the technologies of isolation layer and field plate are the main methods used to improve device performance. Isolation layer is used to suppress the surface traps, field plate is used to increase the breakdown voltage, both have very good results. However, no studies have yet to combine these two structures, allowed the device to suppress the surface traps for high output current and high breakdown voltage.
To suppress the device performance degradation, the isolation layer and field plate are introduced at the same time. Not only achieved the inhibitory effect of surface traps but also the breakdown voltage is improved. By optimizing the parameters of the two structure, the device output current and breakdown voltage increase together. Firstly, 4H-SiC MESFET device structure and physical models is established by two-dimensional device simulator ISE-TCAD .According to the basic DC operating characteristics of traditional structure of 4H-SiC MESFET, research methods are determined through analysis of output characteristics, transfer characteristics and other characteristics. Secondly, the impact of the surface trap is studied from transfer characteristics and output characteristics , and find out the surface trap density and energy level that make the device performance degenerate mostly: density 1×10~(13)cm~(-2), energy level from the conduction band 1.8eV. In such cases, drain-source current of 4H-SiC MESFET is reduced by 120% , and the Tran conductance decrease by 50%. Third, on the basis of these studies, doping concentration ,depth and the depth of the buried gate of isolation layer were optimized by compare with the ideal trap-free condition .the optimal parameters: Spacer layer thickness:0.1μm, doping concentration 1×10~(14)cm~(-3), buried gate depth 0.05μm.Making simulation at this group of Optimization parameters, the surface trap effect has been effectively suppressed, and the introduction of small parasitic parameters, DC performance of device is greatly improved. Compared with the traditional structure of the trap, drain-source current increased by 130%, the Tran conductance gain of more than 20mS/mm voltage operating range increased by about 100%. Finally, a field plate is introduced on the isolation layer structure, and analysis the impact of the DC characteristics . By analyzing the mechanism of field plate , it’s found that the field plate and isolated layers don’t affect each other . Optimized field plate length, the breakdown voltage can be improved by 60%.
本文针对器件的表面陷阱所带来的器件性能的退化,同时把隔离层和场板同时引入器件结构,不仅达到了抑制表面陷阱的效果,并且提高了击穿电压;通过优化二者的参数,提高了器件的输出电流和击穿电压。本文首先利用二维器件仿真软件ISE-TCAD建立了4H-SiC MESFET器件的结构模型和物理模型。根据对传统4H-SiC MESFET结构的基本直流工作特性中输出特性、转移特性等特性的分析,确定了基本模型和研究方法。其次,从器件的输出特性和转移特性两方面对表面陷阱的影响进行了研究,并结合实际确定了使得器件性能退化最大的表面陷阱的密度和能级:密度为1×10~(13)cm~(-2),能级距离导带1.8eV。在此种情况下,4H-SiC MESFET漏源电流下降约120%,跨导下降约50%。第三,在上述研究基础上,对隔离层掺杂浓度、厚度和隔离层中的埋栅深度进行了优化和无陷阱的理想状态进行对比,得到优化参数:隔离层的厚度为0.1μm,掺杂浓度为1×10~(14)cm~(-3),埋栅深度为为0.05μm。在这组优化参数下进行仿真,表面陷阱效应得到有效抑制,且引入的寄生参数较小,器件的直流性能得到大幅度的提高。相对于有陷阱的传统结构,漏源电流提高约130%,跨导增益大于20mS/mm的电压工作范围提高约100%。最后,在隔离层上引入场板结构,分析其对器件的直流特性的影响。分析其对器件击穿电压提高的机理,从而说明场板与隔离层之间不存在相互的影响。经优化场板的长度,可以提高器件的击穿电压约60%。
Silicon carbide (SiC) is a very promising candidate for high temperature, high power, high frequency, and radiation hardness applications because of its superior properties such as wide band gap, high critical breakdown field, high thermal conductivity and high saturation electron drift velocity. In recent years it became a hot research field of semiconductor. As the property of SiC material, now the high intrinsic surface states and interface states are prevalent in the successfully manufactured SiC microwave power MESFET devices, making the device output current decline sharply in DC characteristics .when devices is worked at high-frequency, current Instability and current collapse is caused by surface states and interface states. At present, the technologies of isolation layer and field plate are the main methods used to improve device performance. Isolation layer is used to suppress the surface traps, field plate is used to increase the breakdown voltage, both have very good results. However, no studies have yet to combine these two structures, allowed the device to suppress the surface traps for high output current and high breakdown voltage.
To suppress the device performance degradation, the isolation layer and field plate are introduced at the same time. Not only achieved the inhibitory effect of surface traps but also the breakdown voltage is improved. By optimizing the parameters of the two structure, the device output current and breakdown voltage increase together. Firstly, 4H-SiC MESFET device structure and physical models is established by two-dimensional device simulator ISE-TCAD .According to the basic DC operating characteristics of traditional structure of 4H-SiC MESFET, research methods are determined through analysis of output characteristics, transfer characteristics and other characteristics. Secondly, the impact of the surface trap is studied from transfer characteristics and output characteristics , and find out the surface trap density and energy level that make the device performance degenerate mostly: density 1×10~(13)cm~(-2), energy level from the conduction band 1.8eV. In such cases, drain-source current of 4H-SiC MESFET is reduced by 120% , and the Tran conductance decrease by 50%. Third, on the basis of these studies, doping concentration ,depth and the depth of the buried gate of isolation layer were optimized by compare with the ideal trap-free condition .the optimal parameters: Spacer layer thickness:0.1μm, doping concentration 1×10~(14)cm~(-3), buried gate depth 0.05μm.Making simulation at this group of Optimization parameters, the surface trap effect has been effectively suppressed, and the introduction of small parasitic parameters, DC performance of device is greatly improved. Compared with the traditional structure of the trap, drain-source current increased by 130%, the Tran conductance gain of more than 20mS/mm voltage operating range increased by about 100%. Finally, a field plate is introduced on the isolation layer structure, and analysis the impact of the DC characteristics . By analyzing the mechanism of field plate , it’s found that the field plate and isolated layers don’t affect each other . Optimized field plate length, the breakdown voltage can be improved by 60%.
引文
[1]张义门,张玉明.“碳化硅器件的需求背景及其发展现状”.电子科学技术评论.1996, No.2.
[2]杨克武,潘静,杨银堂.“半导体材料及其器件应用”.半导体情报.2000年6月,第37卷,第2期,第13-15页
[3] A.A.Lebedev.“High Power SiC Devices-new Result and Prospects”.High Temperature Electronic Materials. Devices and Sensors conference.1998, pp.29-39.
[4]张玉明,张义门,罗晋升.“SiC、GaAs和Si的高温特性比较”.固体电子学研究与进展.1997, 17(3):305-309.
[5] C.E.Weitzel.“Comparison of SiC,GaAs and Si RF MESFET Power Densities”.IEEE Electron Device Letters. Oct.1995, 16(10):pp.451-453.
[6]田敬民.“SiC半导体材料与器件”.半导体杂志.1996年6月,第21卷,第2期,第27-37页.
[7] Sriram.S.,Hagleitner.H., Namishia. D.“High-Gain SiC MESFETs Using Source-Connected Field Plates”.Electron Device Letters, IEEE.2009,Vol.30,Issue. 9,pp.952-953.
[8] Ray Pengelly.“High power RF transistors”. Wireless and Microwave Technology. 2001: An Industry/Government/Education Forμm, pp2000.
[9] P.A.Nilsson , A.M Saroukhan, J.O,Svedberg , et al.“Characterization of SiC MESFETs on conducting substrates”. Materials Science Forμm,.2000, Vol. 338-342,pp.1255-1258.
[10] Jian.H.Zhao,Kiyoshi.Tone,et al.“1710-V 2.77-m?.cm2 4H-SiC trenched and implanted vertical junction field-effect transistors”.IEEE ELECTRON DEVICE LETTERS.2003,24(2):81.
[11] R.A Sadler, .S.T.Allen, T.S Alcorn,.et al.“SiC MESFET with output power of 50 watts CW at S-band”.56th Annual HT Device Research Conference Digest TH . 1998, June ,pp.92–93.
[12] H.G.Henry, G.Augustine, G.C.DeSalvo,et al.“S-band operation of SiC power MESFET with 20 W (4.4 W/mm) output power and 60% PAE”.IEEE Transactions on ED,.2004,51(6):839.
[13] B.Luo, P.Chen, A.Higgins, et al.“56W SiCMESFET transistors with > 50% PAE for L-band applications”. The 17th International Symposiμm on. 2005 Page(s): 155- 157.
[14] K.Andersson,M.Sudow, P.Nilsson,et al.“Fabrication and characterization of field-plated buried-gate SiC MESFETs”. IEEE HT Electron Device Letters.2006 ,July,27(7),pp.573-575.
[15] H.Y.Cha,Y.C.Choi,L.F. Eastman,et al.“Simulation study on breakdown behavior field-plate SiC MESFETs”.High Speed Electron,Syst.2004,14(3):pp.884-889.
[16] Deng Xiaochuan,,Zhang Bo,Li Zhaoji,et al.“Improved dual-channel 4H-SiC MESFETs with high doped n-type surface layers and step-gate structure”,Journal of Semiconductors.2009,30(7),pp.074001-074005
[17]邓小川.“4H-SiC MESFETs微波功率器件新结构与实验研究”.电子科技大学博士论文.2008年6月
[18] Xianghua Liu, Zhengyi Jiang,Jingtao Han.“A New 4H-SiC MESFET Utilizing N- Shielding and Field Plate Techniques Simultaneously”.Advanced Materials Research.2010,VOL148-149,pp.1182-1187
[19] D.Alok, P.K.Mclarty,B.J.Baliga,.“Electrical properties of thermal oxide grown using dry oxidation on p-type 6H-Silicon carbide”.Applied Physics letters. 1994, 65(17): 2177-2178.
[20] L.Kassamakova, R.D.Kakanakov, I.V.Kassamakov, et al.“Temperature Stable Pd Ohmic Contacts to p-Type 4H-SiC Formed at Low Temperatures”.IEEE Trans. Electron Device. 1999, 46(3),pp.605-611
[21] D.J.Larkin, P.G.Neudeck, J.A.Powell, L.G.Matus, Inst. Phys. Conf. Ser. 1994,No. 137, pp.51-54.
[22] J.W. Slotboom and H.C. de Graaff.“Band gap narrowing in silicon bipolar transistors”.IEEE Transaction on Electron Devices,.1977, Vo1.24, No.8, pp.1123- 1125.
[23]张玉明.“碳化硅材料与器件的研究”.西安交通大学博士论文.1998年4月.
[24]刘恩科,朱秉升,罗晋生.《半导体物理学》.国防工业出版社.1990.
[25] Martin Ruff, Heinz Mitlehner, Reinhard Helbig.“SiC Devices: Physics and Nμmerical Simulation”. IEEE Transactions on Electron Devices. 1994,June,41(6) , pp.1040-1054,.
[26] Avant! Corporation 1998 Medici, Two-Dimensional Device Simulation Program, Version 4.1, User Manual (TACAD Brisiness Unit, Fremont, Califormia, USA).
[27]徐俊平.“4H-SiC MESFET结构设计与特性模拟”.西安电子科技大学研究生论文.2008年1月
[28]杨林安,张义门,于春利等“.表面态对碳化硅功率金一半场效应管特性的影响”.计算物理.2003,20(5):418-422.
[29] G.W.Charache, S.Akram, E.W.Maby,et al,“Surface passivation of GaAs MESFETs”.IEEE Trans ED.1997,44(11),pp.1837-1842.
[30] Hasμmi yμmiko,Kodera Hiroshi.“Simulation of the Surface Trap Effect on the Gate Lag in GaAs MESFETs”.Electronics and Communications in Japan,2001,J84-C-I(4):286-293[34].
[31]邵科.“基于陷阱的4H-SiC MESFET频散效应研究”.西安电子科技大学硕士论文.2008年1月.
[32]邵科,曹全君,张义门等.“基于陷阱的4H-SiC MESFET频散效应分析”.微电子学.2007,37(6):pp830-832.
[33] Wen Huang, Yunchuan Guo, Yuehang Xu,et al.“Improved Characteristics of 4H-SiCMESFETs With Partly P-type doped Space Layer”. IEEE International symposiμm.2009,OCT,pp.1012-1015.
[34] Silicon Carbide Power MESFET with Surface Effect Suppressive Layer.U.S.Patent#5 925 895, July 20, 1999.
[35]陈亮.“埋栅-埋沟4H-SiC MESFET特性模拟研究”.西安电子科技大学硕士论文.2009年1月.
[36]郑少金.“埋栅-埋沟4H-SiC MESFET结构优化研究”.西安电子科技大学硕士论文.2009年1月.
[37] Y.Hori,M.Kuzuhara,Y.Ando,et al.“Analysis of electric field distribution in GaAs metal-semiconductor field effect transistor with a field-modulating plate”.J.Appl. Phys,2000,87(7):pp.3483—3487 .
[38] Y.Ando,Y.Okamoto,H.Miyamoto,et al.“10W/mm AlGaN HFET With a Field Modulating Plate”.IEEE Electron Device letters.2003,24(5):pp89-29l.
[39] V.Kμmar,G.Chert,B.Peres,et al.“Field-plated 0.25pro gate-length AIGaN/GaN HEMTs on 6H-SiC with power density of 9.1W/mm at 18 GHz”. IEEE Electronics Letters.2005,41(19):pp.1080-1081.
[40] Y.Okamoto,Y.Ando,T.Nakayama,et al.“High-Power Recessed-Gate A1GaN- GaN HFET with a Field—Modulating Plate”.IEEE Electron Device letters.2004 51(12):pp.2217-2222.
[41] S.Karmalkar,M.Shut,G.Simin,et al.”Field-Plate Engineering for HFETs”,IEEE Electron Device.2005,52(12):pp.2534-2540.
[42] Per-?ke Nilsson,Fredrik Allerstam,Mattias Südow,et al,.“Influence of Field Plates and Surface Traps on Microwave Silicon Carbide MESFETs”. IEEE TRANSACTIONS ON ELECTRON DEVICES.2008,VOL. 55, NO. 8, AUGUST .
[43] Xiaochuan Deng, Bo Zhang, Zhaoji Li,et al,.“High Performance 4H-SiC MESFETswith a Source Field PlatedStructure”.IEEE IEDST .2007.pp.78-81.
[44]余岑.带隔离层和场板的4H-SiC MESFET结构优化与特性研究. .西安电子科技大学硕士论文.2010年1月.
[2]杨克武,潘静,杨银堂.“半导体材料及其器件应用”.半导体情报.2000年6月,第37卷,第2期,第13-15页
[3] A.A.Lebedev.“High Power SiC Devices-new Result and Prospects”.High Temperature Electronic Materials. Devices and Sensors conference.1998, pp.29-39.
[4]张玉明,张义门,罗晋升.“SiC、GaAs和Si的高温特性比较”.固体电子学研究与进展.1997, 17(3):305-309.
[5] C.E.Weitzel.“Comparison of SiC,GaAs and Si RF MESFET Power Densities”.IEEE Electron Device Letters. Oct.1995, 16(10):pp.451-453.
[6]田敬民.“SiC半导体材料与器件”.半导体杂志.1996年6月,第21卷,第2期,第27-37页.
[7] Sriram.S.,Hagleitner.H., Namishia. D.“High-Gain SiC MESFETs Using Source-Connected Field Plates”.Electron Device Letters, IEEE.2009,Vol.30,Issue. 9,pp.952-953.
[8] Ray Pengelly.“High power RF transistors”. Wireless and Microwave Technology. 2001: An Industry/Government/Education Forμm, pp2000.
[9] P.A.Nilsson , A.M Saroukhan, J.O,Svedberg , et al.“Characterization of SiC MESFETs on conducting substrates”. Materials Science Forμm,.2000, Vol. 338-342,pp.1255-1258.
[10] Jian.H.Zhao,Kiyoshi.Tone,et al.“1710-V 2.77-m?.cm2 4H-SiC trenched and implanted vertical junction field-effect transistors”.IEEE ELECTRON DEVICE LETTERS.2003,24(2):81.
[11] R.A Sadler, .S.T.Allen, T.S Alcorn,.et al.“SiC MESFET with output power of 50 watts CW at S-band”.56th Annual HT Device Research Conference Digest TH . 1998, June ,pp.92–93.
[12] H.G.Henry, G.Augustine, G.C.DeSalvo,et al.“S-band operation of SiC power MESFET with 20 W (4.4 W/mm) output power and 60% PAE”.IEEE Transactions on ED,.2004,51(6):839.
[13] B.Luo, P.Chen, A.Higgins, et al.“56W SiCMESFET transistors with > 50% PAE for L-band applications”. The 17th International Symposiμm on. 2005 Page(s): 155- 157.
[14] K.Andersson,M.Sudow, P.Nilsson,et al.“Fabrication and characterization of field-plated buried-gate SiC MESFETs”. IEEE HT Electron Device Letters.2006 ,July,27(7),pp.573-575.
[15] H.Y.Cha,Y.C.Choi,L.F. Eastman,et al.“Simulation study on breakdown behavior field-plate SiC MESFETs”.High Speed Electron,Syst.2004,14(3):pp.884-889.
[16] Deng Xiaochuan,,Zhang Bo,Li Zhaoji,et al.“Improved dual-channel 4H-SiC MESFETs with high doped n-type surface layers and step-gate structure”,Journal of Semiconductors.2009,30(7),pp.074001-074005
[17]邓小川.“4H-SiC MESFETs微波功率器件新结构与实验研究”.电子科技大学博士论文.2008年6月
[18] Xianghua Liu, Zhengyi Jiang,Jingtao Han.“A New 4H-SiC MESFET Utilizing N- Shielding and Field Plate Techniques Simultaneously”.Advanced Materials Research.2010,VOL148-149,pp.1182-1187
[19] D.Alok, P.K.Mclarty,B.J.Baliga,.“Electrical properties of thermal oxide grown using dry oxidation on p-type 6H-Silicon carbide”.Applied Physics letters. 1994, 65(17): 2177-2178.
[20] L.Kassamakova, R.D.Kakanakov, I.V.Kassamakov, et al.“Temperature Stable Pd Ohmic Contacts to p-Type 4H-SiC Formed at Low Temperatures”.IEEE Trans. Electron Device. 1999, 46(3),pp.605-611
[21] D.J.Larkin, P.G.Neudeck, J.A.Powell, L.G.Matus, Inst. Phys. Conf. Ser. 1994,No. 137, pp.51-54.
[22] J.W. Slotboom and H.C. de Graaff.“Band gap narrowing in silicon bipolar transistors”.IEEE Transaction on Electron Devices,.1977, Vo1.24, No.8, pp.1123- 1125.
[23]张玉明.“碳化硅材料与器件的研究”.西安交通大学博士论文.1998年4月.
[24]刘恩科,朱秉升,罗晋生.《半导体物理学》.国防工业出版社.1990.
[25] Martin Ruff, Heinz Mitlehner, Reinhard Helbig.“SiC Devices: Physics and Nμmerical Simulation”. IEEE Transactions on Electron Devices. 1994,June,41(6) , pp.1040-1054,.
[26] Avant! Corporation 1998 Medici, Two-Dimensional Device Simulation Program, Version 4.1, User Manual (TACAD Brisiness Unit, Fremont, Califormia, USA).
[27]徐俊平.“4H-SiC MESFET结构设计与特性模拟”.西安电子科技大学研究生论文.2008年1月
[28]杨林安,张义门,于春利等“.表面态对碳化硅功率金一半场效应管特性的影响”.计算物理.2003,20(5):418-422.
[29] G.W.Charache, S.Akram, E.W.Maby,et al,“Surface passivation of GaAs MESFETs”.IEEE Trans ED.1997,44(11),pp.1837-1842.
[30] Hasμmi yμmiko,Kodera Hiroshi.“Simulation of the Surface Trap Effect on the Gate Lag in GaAs MESFETs”.Electronics and Communications in Japan,2001,J84-C-I(4):286-293[34].
[31]邵科.“基于陷阱的4H-SiC MESFET频散效应研究”.西安电子科技大学硕士论文.2008年1月.
[32]邵科,曹全君,张义门等.“基于陷阱的4H-SiC MESFET频散效应分析”.微电子学.2007,37(6):pp830-832.
[33] Wen Huang, Yunchuan Guo, Yuehang Xu,et al.“Improved Characteristics of 4H-SiCMESFETs With Partly P-type doped Space Layer”. IEEE International symposiμm.2009,OCT,pp.1012-1015.
[34] Silicon Carbide Power MESFET with Surface Effect Suppressive Layer.U.S.Patent#5 925 895, July 20, 1999.
[35]陈亮.“埋栅-埋沟4H-SiC MESFET特性模拟研究”.西安电子科技大学硕士论文.2009年1月.
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