摘要
The problem of energy-constrained performance optimization (as opposed to performance-constrained energy optimization) for parallel applications has garnered considerable attention in the area of sustainable computing. This paper surveys algorithms developed for effectively minimizing the degradation in schedule length that results from rescheduling a parallel program to multi-core systems under an energy budget. By utilizing dynamic voltage scaling and the structural properties of the directed acrylic graph (DAG) representing the parallel program, we embrace four static techniques in order to achieve this goal. These heuristics encompass procedures. The first is assigning to a set of tasks a maximum supply voltage followed by methodical voltage reductions, thereby geometrically ¡°stretching?the schedule. The second is assigning to tasks a minimum supply voltage followed by judicious boosts in voltage, thereby ¡°compressing?the schedule. In contrast with the second technique, the third method completely reschedules the DAG following each voltage adjustment. However, this technique largely follows the same procedure as the second method. The surveyed techniques effectively determine what nodes receive voltage adjustments by calculating and comparing each task's ¡°Impact Factor? a metric devised to assist in the intelligent allocation of resources. Calculating the ¡°Impact Factor?of each task (node) involves examining the entire context of the DAG, a rather expensive process. In contrast with the three previous techniques, a fourth method relies only upon the local characteristics of the DAG and state of the schedule for determining a core's viability for supply voltage raise, severely reducing run-time complexity. Detailed simulation experiments demonstrate the effect of various task and processor parameters on the performance of the surveyed algorithms.