摘要
随着现代大规模集成电路的发展,芯片设计复杂度不断提高,设计规模不断扩大,验证设计功能正确性的困难度也大幅增加,需要投入的人力呈指数增长。功能验证逐渐成为SOC设计的瓶颈,验证方法学得到越来越多的重视。
近年来,涌现了一批新的验证方法,比如基于断言的验证、功能覆盖率、基于事务的验证,可约束的随机激励等等;目前验证方法改进的趋势渐渐转移到如何形成更加系统化和结构化的验证过程。
覆盖率导向的验证方法是一种新型的验证方法学,以其贴近设计的思维方式,极大的提高验证的效率,并且已经在业界有许多实际的应用。它基于分层结构验证方法,支持激励的随机产生,自动检查结果,以覆盖率的量化分析为验证的核心,通过对覆盖率的分析,判断验证的完备性。这种机制大大减少了验证过程的工作量。随着支持功能覆盖点、断言和测试平台约束规范的SystemVerilog在业界的普及,以及越来越多的约束随机测试平台的涌现,这种方法会在一段时间内对IC设计工业产生巨大的影响。
本文首先介绍了覆盖率导向验证方法的思想,对该方法的各要素进行分析和总结,然后将它应用到虚拟输出队列(VOQ)的验证过程中,为VOQ建立一个功能覆盖率模型,在仿真过程中,对覆盖率水平进行统计,并以此为依据产生新的高效测试用例。最后结合实验数据,将覆盖率导向的验证方法和传统的验证方法进行比较。
With the development of modern IC design, the scale of chip increased exponentially and the function within one chip becomes more and more complex which makes the verification job supper formidable. Functional verification has become the bottleneck of large-scaled chips design.
Some new verification techniques came out in recent years. E.g. functional coverage, constrained random stimulus, formal verification, transaction-based verification method and etc. Nowadays, the point at the verification flow is revolves around how to make it more systemic and more structural.
CDV(coverage Driven Verification) is a new verification method which can improve the efficiency of testing obviously with it's natural thinking model. It bases on the structural verification method, support constrained random stimulus and the result will be checked automatically. With coverage report as the criterion of verification integrity, it dominants the whole scenario in validation and make the design more reliable. Almost all the EDA vendor has dig into it and coverage statistics has been supported by the mainstream tools.
This thesis will analyze the CDV in detail, summarizes the factors of the method and the verification environment. And then apply it in the verification of Virtual Output Queue (VOQ) module. Create the functional coverage model for VOQ and generate stimulus base on the coverage report. We summarize the difference between traditional verification method and CDV with experiment at the end of the article.
With popularization of the verification languages such as System Verilog it deserved to be a major verification mythology in a few years.
引文
[1]Janick Bergeron.Writing Testbench:Functional Verification Of HDL Model Second Edition[M].Kluwer Academic Publishers,2003.
[2]Janick Bergeron & Eduard Cerny & Alan Hunter & Andrew.NightingaleVerification Methodology Manual for System Verilog[M].Synopsys,Inc and ARM Limited.Springers 2006.
[3]Richard Goering,C Level Design lackies C-to-HDL[J].EE Times,December 14,1998:14-22
[4]Accellera System Verilog 3.1a Language Reference Manual Accellera's Extensions to Verilog[M].Accellera Organization,Inc.Califomia,Napa CA,USA,2005.
[5]Richard Ho.在以覆盖率为导向的验证理论中如何有效结合断言和覆盖点[EB/OL].Mentor Graphics 公司 http://article.ednchina.com/2005-5/AtcShow2005541357151.htm:2005.5.4
[6]Thomas L.Anderson.利用SystemVerilog实现有效的SoC设计验证[EB/OL].Cadence设计系统公司.http://www.eetchina.com/ART_8800469730_480101_NT_1b9fc6e8.HTM:2007.6.28
[7]Lukai Cai.Transaction level modeling:an overview[M].Newport Beach,CA,USA,2003:19-24.
[8]Brian Bailey.适合数百万门级Soc设计的可扩展验证方法[M].MentorC orporation,CA,USA,2003
[9]Synopsys Corporation.Reference Verification Methodology User Guide[M]Synopsys Corporation.CA,USA,2004
[10]Synopsys Corporation.Supplementing VCS-Based Simulations with High Performance Hardware-Assisted Verification[M].Synopsys Corporation.CA,USA,2006
[11]Cisco Systems,Inc.VoQ specification[M].Cisco 内部设计文档,CA,USA,2009
[12]Cisco Systems,Inc.Clipper datasheet[M].Cisco 内部设计文档,CA,USA,2009
[13]Cisco Systems,Inc.Clipper verification environment[M].Cisco 内部文档,CA,USA,2009
[14]王乐康,李立,唐焰,崔松叶等.一种超大规模集成电路的自动验证 方法[J]中国集成电路2007年第7期:22-26
[15]刘杰,徐伟俊,夏宇闻,等.设计验证中的随机约束[J].中国集成电足各,2006(11):28-31,44.
[16]RangarajaJl(Sri)P.如何选择正确的芯片验证方法[EB/OL].电子设计应用http://article.ednchina.com/2006-09/2006913101217.htm:2006
[17]常勇.利用RVM搭建SOC芯片的高效验证平台[J].重庆邮电大学学报400065 17-20
[18]易敏 王进成 程智辉等.一种功能覆盖率测试度量系统和方法[J]哈尔滨理工大学学报vol13 No.1 Feb,2008.02 90-94
[19]William Lam.Hardware Design Verification:Simulation and Formal Method-Based Approaches[M].Sebastopol,CA,Prentice Hall PTR,2005.
[20]解咏梅,张珩,张福新等.基于覆盖率的功能验证方法[J].计算机应用研究2005第一期22-28
[21]常勇.基于RVM的层次化SOC芯片验证平台设计及应用[J]电子设计应用2007.5 77-83