摘要
AVS标准是具有我国自主知识产权的第二代数字音视频信源编解码标准,但目前依然没有成熟的编解码器解决方案,这很不利于AVS在新一代数字音视频产业中的应用。本课题针对AVS的目前的情况和特点,重点对AVS编解码的实际应用做了研究。本文在特定平台下实现AVS解码算法,并基于该平台优化AVS的解码算法,提高AVS解码速度,在此基础上提出AVS视频实时解码器方案。
本文对AVS标准及其核心技术和特点进行了研究。嵌入式平台的实现离不开硬件平台和软件环境,硬件平台和操作系统是AVS解码器实现的基础。本文解码器的硬件平台是以ADSP-BF561为核心的DSP硬件开发平台,软件环境主要是指嵌入式操作系统uClinux环境的建立。
本文主要介绍了AVS解码器在双核DSP平台的实现,以及为使解码器速度达到实时解码而进行的优化工作。
AVS解码器双核DSP实现是本文的重点。本文详细讨论了基于ADSP-BF561平台的解码器实现的方案。包括Core A和Core B的分工与设计,以及双核之间的数据交互过程。
解码器的优化是全文的核心。其中,基于硬件平台的优化是优化工作的重点。本文从对硬件平台的瓶颈的分析入手,提出了优化的原则与核心思想,之后详述了优化的具体过程。基于解码器硬件平台的优化涵盖了对整个解码器流程的各个细节算法的优化过程,其重点是基于处理器平台内存架构的优化。论文对处理器平台内存架构的特点进行了分析,详细阐述了基于内存结构的宏块解码各部分算法的优化过程,并且就基于硬件平台优化后算法流程的改进进行了说明。除此之外,本文还简要介绍了解码器实现过程中用到的其他优化方法,算法模块和C语言的优化以及汇编优化。
采用以上优化方案后,AVS解码器达到了实时解码播放的要求。
AVS (Audio and Video Coding Standard) is the standard of 2nd generation video and audio developed by China independently. Due to the shortage of feasible encoder and decoder solution platforms, the popularization of AVS in the field of video and audio is obstructed. This dissertation is mainly focused on the research of the application of AVS standard. An implementation of the AVS decoder in a dedicated hardware platform is proposed in this thesis, based on which the AVS decoder algorithm is optimized in order to improve the decoding speed. Finally a real-time decoder solution of AVS is proposed.
At first, the core technologies used in AVS are studied and its key algorithms are analyzed. Hardware platform and software environment are two fundamental things of the implementation of AVS decoder. The hardware platform used is a dual-core DSP - ADSP-BF561 based platform. And the software environment introduction is mainly about the establishment of an embedded uClinux OS.
The implementation of AVS decoder on a dual-core DSP platform and the optimization of the decoder in order to make it real-time are the most important work of this dissertation.
The implementation of AVS decoder is the emphasis of this dissertation. The decoder solution based on ADSP-BF561 is discussed in detail, including the design of Core A and Core B, as well as the data exchange process between them.
The optimization of the decoder is the core of this dissertation. The key point of it is the optimization based on the hardware platform. Start with the analysis of the bottleneck of the hardware platform, the principles and key ideas of optimization are drawn out and the details of optimization are elaborated. The optimization based on hardware platform encompasses optimization about every detailed algorithm. And the most important method of optimization based on the hardware platform is to take the advantage of its hierarchy memory architecture. The thesis discusses the processor's memory hierarchy, elaborates optimization about each algorithm process of the macro-block decoding and explains the improvement of the algorithm flow after optimization on hardware platform. Besides, other optimization method is also studied, such as optimization on algorithm of each process module, optimization on C language and assembly language.
The AVS decoder achieved the target of real-time decoding after these optimizations mentioned above.
引文
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