摘要
随着微电子技术的高速发展,实时图像处理在多媒体、图像通信等领域有着越来越广泛的应用。FPGA就是硬件处理实时图像数据的理想选择,基于FPGA的图像处理专用芯片的研究将成为信息产业的新热点。
论文以FPGA为平台,使用VHDL硬件描述语言设计并实现了中值滤波、顺序滤波、数学形态学、边缘检测等图像处理算法。在设计过程中,通过改进算法和优化结构,在合理地利用硬件资源的条件下,有效地挖掘出算法内在的并行性,采用流水线结构优化算法,提高了顶层滤波模块的处理速度。在中值滤波器的硬件设计中,采用一种快速中值滤波算法,该算法大大节省了硬件资源,处理速度也很快,并设计了选择端对多种滑动窗口进行选择,以适应不同的要求。在数学形态学算法的硬件实现中,论文采用的最大值滤波和最小值滤波算法,大大减少了硬件资源的占用率,适应了流水线设计的要求,提高了图像处理速度。
整个设计及各个模块都在Altera公司的开发环境QuartusⅡ软件上进行了逻辑综合以及仿真。综合和仿真的结果表明,使用FPGA硬件处理图像数据不仅能够获得很好的处理效果,达到较高的工作频率,处理速度也远远高于软件法处理图像,可满足实时图像处理的要求。
本课题为图像处理专用FPGA芯片的设计做了有益的探索性尝试,对今后完成以FPGA图像处理芯片为核心的实时图像处理系统的设计有着积极的意义。
With the fast development of electronic technology, real-time image processing is widely used in the fields such as multimedia and image communication. FPGA now has become an ideal choice of hardware in real-time image processing, while the research about the implementation of digital image algorithms based on FPGA will be the new key-point in information industry.
This thesis consists of designing and implementing of digital image algorithms such as median filter, rank order filter, morphological operators, edge detection operator using FPGA in standard hardware description language VHDL. Through improving algorithms and optimizing structures, with conditions of efficiently using of hardware resource, the utility of the parallel algorithm is exploited more efficiently in the design. With pipeline optimization algorithm, the speed of top module dealing with images is largely improved. In the design of median filter, used algorithm called fast median filter is given, this new algorithm can save more resource of FPGA and the speed is accelerated,and designed the selection pin of different sliding window to meet different requirements. In the design of morphological operators, the thesis presents two improved algorithms of maximum filter and minimum filter, both will use less hardware resource used for these two algorithms and fit to the pipeline structure, so the time of dealing with an image is shorter.
The full design of each module are synthesized and simulated on Quartus II of Altera Corp. The result of synthesis and simulation indicate that the design of image processing algorithm based of FPGA can not only achieve a good processed result and get a high frequency, but also it can give a better performance of speed than using software and suit for real-time image processing.
This thesis has investigated the design technologies of specific chip for image processing using FPGA and provided preliminary study for the real-time image processing system based on FPGA.
引文
[1]阮秋琦.数字图像处理学[M].北京:电子工业出版社,2001.1:1-12.
[2]Batlle J,Marti J,Ridao P.A New FPGA/DSP-Based Parallel Architecture for Real-Time Image Processing[J].Real-Time Imaging,2002.8(5),345-356.
[3]延明.FPGA在数字图像处理中的应用[J].电子技术,2005.1:74-76.
[4]李哲英,等.DSP基本理论与应用技术[M].北京:北京航空航天大学出版社,2002:103-106.
[5]Peter M,Athanas A,Lynn A.Addressing the Computational Requirements of Image Processing with a Custom Computing Machine:An Overview(1995),The Ninth International Parallel Processing Symposium,April 1995,Santa Barbara.
[6]褚振勇,等.FPGA设计及应用[M].西安:西安电子科技大学出版社,2006.12:4-23.
[7]戴明桢,周建江.TMS320C54xDSP结构、原理及应用[M].北京:北京航空航天大学出版社,2001.11:2-5.
[8]戴逸民.基于DSP的现代电子系统设计[M].北京:电子工业出版社,2002.5:388-394.
[9]江思敏.TMS320C6000 DSP应州开发教程[M].北京:机械工业出版社,2005.2.
[10]http://www.vision-components.corn/content/view/87/1.
[11]黄智伟,王彦.FPGA系统设计与实践[M].北京:电子工业出版社,2005.1:1-6.
[12]Uwe Meyer-Baese著,刘凌,胡永生译.数字信号处理的FPGA实现[M].北京:清华大学出版社,2003.
[13]http://www.gd-emb.org/detail/id-99.html.
[14]http;//www.eepw.com.cn/show.aspx?id=3058&cid=51.
[15]http://home.rails.com.cn/jc/files/ky/txcl.htm.
[16]http://china.nikkeibp.co.ip/china/news/mech/200409/mech200409160121.htm 1.
[17]Kessal L,Abel N,Demigny D.Real-time image processing with dynamically reconfigurable architecture,Real-Time Imaging,Volume 9,Number 5,October 2003,297-313.
[18]Kass M,Wittkin A and Terzopoulos Snakes D:Active contour models[J].International Joumal of Computer Vision,1988,2(3):321-331.
[19]李清水,方志刚等.手势识别技术及其在人机交互中的应用[J].人类工效学,2002,8(1):27-33.
[20]杜威,李华.基于单目视觉的手势识别系统[J].工程图学学报,2000,(3):133-137.
[21]丁海洋,阮秋琦.多尺度模型与矩描绘子相结合的手势识别算法[J].北京交通大学学报,2004,28(2):41-45.
[22]刘俊梅,阮秋琦.一种复杂背景下的手势分割新方法[J].北京电子科技学院学报,2006,14(2):23-27.
[23]陶霖密,彭振云,徐光祜.人体的肤色特征[J].软件学报,2001,12(07):1032-1041.
[24]杨盈昀.基于人体肤色的人脸检测[J].北京广播学院(自然科学版),2002.9(4):11-20.
[25]徐建华.图像处理与分析[M].北京:科学出版社,2001.
[26]夏德深,傅德胜.现代图像处理技术与应用[M].东南大学出版社,1997年12月,51-54.
[27]GavinV Bates L,Saeid N.FPGA Implementation of a Median Filter,IEEE TENCON-Speech and Image Technologies for Computing and Telecommunications,1997,437-440.
[28]Arce GR,Foster R F,Detail-preserving ranked-order based filters for image processing,IEEE Transactions on ASSP,1989,37(1),83-98.
[29]刚萨雷斯.数字图像处理(第二版)[M].北京:电子工业出版社,2003.3:420-454.
[30]柳国普,张桂林,张宁,等.基于FPGA的灰度形态学滤波器实现[J].微型机与应用,2004年第5期:22-24.
[31]杨枝灵,王开.Visual C++数字图像获取、处理及实践应用[M].北京:人民邮电出版社,2003.1:504-553.
[32]胡小锋,赵辉.Visual C++/MATLAB图像处理与识别实用案例精选[M].北京:人民邮电出版社,2004.9:85-86.
[33]Davis L.A Survey of Edge Detection Techniques.Computer Graphics and Image Processing:1975,20(4):248-270.
[34]潘松,黄继业.EDA技术实用教程[M].北京:科学出版社,2002:33-34.
[35]张志刚.FPGA与SOPC设计教程—DE2实践[M].西安:西安电子科技大学出版社,2007.4:10-11.
[36]关于Cyclone Ⅱ系列FPGA器件问题的探讨[J].电子世界,2005,87(9):42-43.
[37]王道宪,贺名臣,刘伟.VHDL电路设计技术[M].北京:国防工业出版社,2004.1.
[38]姜立东.VHDL语言程序设计及应用[M].北京:北京邮电大学出版社,2001.8:1-6.
[39]Berge J-M,Fonkoua A,Maginot S.VHDL Designers Reference Netherlands.Kluwer Academic Publishers,1992,13-129.
[40]Altera Corporation,Quartus Ⅱ Version 6.0 Handbook,http://www.altera.com.
[41]吴继华,王诚.Altera FPGA/CPLD设计(基础篇)[M].北京:人民邮电出版社,2005.
[42]吴继华,王诚.Altera FPGA/CPLD设计(高级篇)[M].北京:人民邮电出版社,2005.
[43]朱明,鲁剑锋.基于DSP+FPGA结构图像处理系统设计与实现(J].计算机测量与控制.2004.12(9):866-869.
[44]陈家新,黎蔚,等.FPGA在图像处理中的应用[J].洛阳工学院报.2001,6.22(1):51-53.
[45]贾云得.机器视觉[M].北京:科学出版社,2000.78-79.