FPGA Implementation of High Speed Low Area DWT Based Invisible Image Watermarking Algorithm
详细信息   
摘要
In recent years, the applications about multimedia have been developed rapidly. Digital media brings about conveniences to the people, because it is easy to be processed. At the same time, it enables the illegal attackers to attack the works. For the protection of data, there has been growing interest in developing effective techniques to discourage the unauthorized duplication of digital data. Digital watermarking is the process of embedding information into a digital signal in a way that is difficult to remove. The fragile and semi fragile watermarking techniques have some serious disadvantages like increased use of resources, larger area requirements, and high power consumption. In order to overcome this, robust invisible watermarking technique is used in this paper for images. A watermark is embedded in the host signal for authentication. The whole algorithm is designed and simulated using simulink block in MATLAB and then the algorithm is converted into Hardware Description Language (HDL) using Xilinx system generator tool. The algorithm is prototyped in virtex -6 (vsx315tff1156-2) FPGA. The results show that proposed design can operate at maximum frequency 344 MHz in Vertex 6 FPGA by consuming only 1.1 % of available device.