用户名： 密码： 验证码：
High-Speed Planar GaAs Nanowire Arrays with fmax > 75 GHz by Wafer-Scale Bottom-up Growth
详细信息    查看全文
文摘
heet" type="text/css" href="/templates/jsp/css/jquery-ui-1.10.2/base/jquery-ui.min.css"/><head> High-Speed Planar GaAs Nanowire Arrays with fmax > 75 GHz by Wafer-Scale Bottom-up Growth - Nano Letters (ACS Publications) hema.DC" href="http://purl.org/DC/elements/1.0/" />hen Zhang" />hene channels in-plane with the substrate. For a planar GaAs NW array-based HEMT with 150 nm gate length and 2 V drain bias, the on/off ratio (ION/IOFF), cutoff frequency (fT), and maximum oscillation frequency (fmax) are 104, 33, and 75 GHz, respectively. By characterizing more than 100 devices on a 1.5 脳 1.5 cm2 chip, we prove chip-level electrical uniformity of the planar NW array-based HEMTs and verify the feasibility of using this bottom-up planar NW technology for post-Si large-scale nanoelectronics." />her" content="American Chemical Society" />heme="WTN8601" content="December 22, 2014" />heme="doi" content="10.1021/nl503596j" /> heet" type="text/css" />heet" type="text/css" /> heet" type="text/css" media="print" href="/templates/jsp/_style2/_achs/css/atypon-print.css" /> head>
Log In Register ACS Journals | hemworx.org&loc=%2Fdoi%2Fabs%2F10.1021%2Fnl503596j&pubId=419762264">ACS ChemWorx | ACS eBooks | ACS Style Guide | C&EN Archives | Subscribe | help%2Fpassthru.cgi&loc=%2Fdoi%2Fabs%2F10.1021%2Fnl503596j&pubId=419762264" target="_blank" class="help">Help Advanced Search
Digital Object Identifier (DOI)

Select a CAS section from the 5 main topical divisions below:

Letter

High-Speed Planar GaAs Nanowire Arrays with fmax > 75 GHz by Wafer-Scale Bottom-up Growth

Xin Miao 鈥?/sup>hema-instance" xml:space="preserve">, Kelson Chabak 鈥?/sup>鈥?/sup>hema-instance" xml:space="preserve">, Chen Zhang 鈥?/sup>hema-instance" xml:space="preserve">, Parsian K. Mohseni 鈥?/sup>hema-instance" xml:space="preserve">, Dennis Walker hema-instance" xml:space="preserve">, Jr.鈥?/sup>hema-instance" xml:space="preserve">, and Xiuling Li *鈥?/sup> 鈥?/sup> Microand Nanotechnology Laboratory, Universityof Illinois Urbana鈭扖hampaign, 208 N. Wright Street, Urbana, Illinois 61801, UnitedStates鈥?/sup> AirForce Research Laboratory, Sensors Directorate, 2241 Avionics Circle, Wright-PattersonAir Force Base, Ohio 45433, United StatesNano Lett., 2015, 15 (5), pp 2780–2786DOI: 10.1021/nl503596jPublication Date (Web): December 10, 2014Copyright 漏 2014 American Chemical Society*E-mail: du">xiuling@illinois.edu.

Abstract

Wafer-scale defect-free planar III鈥揤 nanowire (NW) arrays with 鈭?00% yield and precisely defined positions are realized via a patterned vapor鈥搇iquid鈥搒olid (VLS) growth method. Long and uniform planar GaAs NWs were assembled in perfectly parallel arrays to form double-channel T-gated NW array-based high electron mobility transistors (HEMTs) with DC and RF performance surpassing those for all field-effect transistors (FETs) with VLS NWs, carbon nanotubes (CNTs), or graphene channels in-plane with the substrate. For a planar GaAs NW array-based HEMT with 150 nm gate length and 2 V drain bias, the on/off ratio (ION/IOFF), cutoff frequency (fT), and maximum oscillation frequency (fmax) are 104, 33, and 75 GHz, respectively. By characterizing more than 100 devices on a 1.5 脳 1.5 cm2 chip, we prove chip-level electrical uniformity of the planar NW array-based HEMTs and verify the feasibility of using this bottom-up planar NW technology for post-Si large-scale nanoelectronics.

© 2004-2018 中国地质图书馆版权所有 京ICP备05064691号 京公网安备11010802017129号

地址：北京市海淀区学院路29号 邮编：100083

电话：办公室：(+86 10)66554848；文献借阅、咨询服务、科技查新：66554700