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High-Speed Planar GaAs Nanowire Arrays with fmax > 75 GHz by Wafer-Scale Bottom-up Growth
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lesheet" type="text/css" href="/templates/jsp/css/jquery-ui-1.10.2/base/jquery-ui.min.css"/> le> High-Speed Planar GaAs Nanowire Arrays with fmax > 75 GHz by Wafer-Scale Bottom-up Growth - Nano Letters (ACS Publications) le> le-Type" content="text/css"/> lements/1.0/" />le" content="High-Speed Planar GaAs Nanowire Arrays with fmax > 75 GHz by Wafer-Scale Bottom-up Growth" />Zhang" />le defect-free planar III鈥揤 nanowire (NW) arrays with 鈭?00% yield and precisely defined positions are realized via a patterned vapor鈥搇iquid鈥搒olid (VLS) growth method. Long and uniform planar GaAs NWs were assembled in perfectly parallel arrays to form double-channel T-gated NW array-based high electron mobility transistors (HEMTs) with DC and RF performance surpassing those for all field-effect transistors (FETs) with VLS NWs, carbon nanotubes (CNTs), or graphene channels in-plane with the substrate. For a planar GaAs NW array-based HEMT with 150 nm gate length and 2 V drain bias, the on/off ratio (ION/IOFF), cutoff frequency (fT), and maximum oscillation frequency (fmax) are 104, 33, and 75 GHz, respectively. By characterizing more than 100 devices on a 1.5 脳 1.5 cm2 chip, we prove chip-level electrical uniformity of the planar NW array-based HEMTs and verify the feasibility of using this bottom-up planar NW technology for post-Si large-scale nanoelectronics." />Date" scheme="WTN8601" content="December 22, 2014" /> le.css" rel="stylesheet" type="text/css" />le2/style.css" rel="stylesheet" type="text/css" />le type="text/css">le> le2/_achs/favicon.ico" /> lesheet" type="text/css" media="print" href="/templates/jsp/_style2/_achs/css/atypon-print.css" /> le type="text/css">/* Page not found list spacing - added 7/16/14 by fc */div.errorBlock ul { padding: 0.25em 0 0 2em;}/* End page not found list spacing *//* journal top box font color - added 7/3/14 by fc */.series-info .series-info__about .series-links { color: #444444;}/* end journal top box font color *//* audioBoxWrap remove border - added 6/23/14 by fc */.audioBoxWrap { border: none;}.reduceBottomMargin { margin-bottom: 2px;}/* end audioBoxWrap *//* Follow ACS Mobile Updates - added April 8 by vp */#textArea #follow-pane-mobile img#mobile-group { clear: left; float: left; margin-bottom: 3em; width: 407px;}#textArea #follow-pane-mobile .mobile { clear: none; float: left; width: 42%;}#textArea #follow-pane-mobile a.mobile-button { clear: none; display: block; float: left; width: 147px;}#textArea #follow-pane-mobile .widget { clear: none; float: left; margin-right: 3%; width: 45%;}#follow-tabs ul li.mobile a { background-position: -649px 0;}#follow-tabs ul li.mobile a.current { background-position: -649px -62px;}#follow-tabs ul li.mobile:hover { height: 62px; top: -0;}/* end Follow ACS Mobile *//* Updated font color in footer */#pageFooter-wrap.partners h3 { color: #296595; }/*Removes CAS Section*/div.collectionInfo {display: none;}le>le type="text/css">.JCESubscriptionMessage { display: none; }le>le type="text/css">.viewMoreLess h3 { margin-bottom: 6px; }.viewMoreContent, .viewMore, .viewLess { display: none; }.viewMore, .viewLess { font-weight: bold; }.viewMoreContent.selected, .viewMore.selected, .viewLess.selected { display: block; }le>le type="text/css">div#mobileDevicePairing_login {background: #fff; margin: 7px; padding: 10px; width: 963px; border: 1px solid #ccc; font-size: 0.8em;}div#mobileDevicePairing_login ol {margin-left: 25px;}div#mobileDevicePairing_login .field {padding-bottom: 3px;} div#mobileDevicePairing_login .personLogin label, div#mobileDevicePairing_login .emailLogin label {margin-right: 3px;}div#mobileDevicePairing_login .emailLogin {display: none;}le>le type="text/css">div#sideCol div.twitter {margin-bottom: 5px;}div#sideCol div.twitter a.twitter-timeline { display: inline-block;width: 155px;padding: 2px 3px 0 22px;border: #ccc solid 1px;border-radius: 3px;background: #f8f8f8 url(//platform.twitter.com/images/bird.png) 2px 3px no-repeat;background: url(//platform.twitter.com/images/bird.png) 2px 3px no-repeat, -webkit-linear-gradient(#fff, #dedede);background: url(//platform.twitter.com/images/bird.png) 2px 3px no-repeat, linear-gradient(#fff, #dedede);background-size: 16px 13px, auto auto;/* Text */font: bold 11px/17px Helvetica, Arial, sans-serif;text-decoration: none;color: #333;text-shadow: 0 1px 0 rgba(255, 255, 255, .5);white-space: nowrap;overflow: hidden;}le> le pod"> le="text-decoration: none; border: none;">
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Letter

leTitle">High-Speed Planar GaAs Nanowire Arrays with fmax > 75 GHz by Wafer-Scale Bottom-up Growth

Xin Miao 鈥?/sup>
, Kelson Chabak 鈥?/sup>鈥?/sup>, Chen Zhang 鈥?/sup>, Parsian K. Mohseni 鈥?/sup>, Dennis Walker , Jr.鈥?/sup>, and Xiuling Li *鈥?/sup> 鈥?/sup> Microand Nanotechnology Laboratory, Universityof Illinois Urbana鈭扖hampaign, 208 N. Wright Street, Urbana, Illinois 61801, UnitedStates鈥?/sup> AirForce Research Laboratory, Sensors Directorate, 2241 Avionics Circle, Wright-PattersonAir Force Base, Ohio 45433, United StatesNano Lett., 2015, 15 (5), pp 2780–2786DOI: 10.1021/nl503596jPublication Date (Web): December 10, 2014Copyright 漏 2014 American Chemical Society*E-mail: xiuling@illinois.edu.

Abstract

Wafer-scale defect-free planar III鈥揤 nanowire (NW) arrays with 鈭?00% yield and precisely defined positions are realized via a patterned vapor鈥搇iquid鈥搒olid (VLS) growth method. Long and uniform planar GaAs NWs were assembled in perfectly parallel arrays to form double-channel T-gated NW array-based high electron mobility transistors (HEMTs) with DC and RF performance surpassing those for all field-effect transistors (FETs) with VLS NWs, carbon nanotubes (CNTs), or graphene channels in-plane with the substrate. For a planar GaAs NW array-based HEMT with 150 nm gate length and 2 V drain bias, the on/off ratio (ION/IOFF), cutoff frequency (fT), and maximum oscillation frequency (fmax) are 104, 33, and 75 GHz, respectively. By characterizing more than 100 devices on a 1.5 脳 1.5 cm2 chip, we prove chip-level electrical uniformity of the planar NW array-based HEMTs and verify the feasibility of using this bottom-up planar NW technology for post-Si large-scale nanoelectronics.

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