SET-PAR: Place and Route Tools for the Mitigation of Single Event Transients on Flash-Based FPGAs

详细信息    查看全文

• 作者：Luca Sterpone (17)
  Boyang Du (17)
  
  17. Dipartimento di Automatica e Informatica ; CAD Group ; Politecnico di Torino ; Torino ; Italy
  
• 关键词：Flash ; based FPGAs ; Single Event Transients ; Mitigation ; Electric filtering
• 刊名：Lecture Notes in Computer Science
• 出版年：2015
• 出版时间：2015
• 年：2015
• 卷：9040
• 期：1
• 页码：129-140
• 全文大小：369 KB
• 参考文献：1. Speers, T., Wang, J.J., Cronquist, B., McCollum, J., Tseng, H., Katz, R., Kleyner, I.: 鈥?.25 碌m FLASH memory based FPGA for space applications. presented at the Military Aerospace Programmable Logic Devices Conference (MAPLD), Greenbelt, MD (1999)
  2. Rezgui, S., Wang, J.J., Sun, Y., Cronquist, B., McCollum, J.: New reprogrammable and non-volatile radiation tolerant FPGA: RTA3P. In: Proceedings of IEEE Aerospace Conference, pp. 1鈥?1 (March 2008)
  3. Berg, M, Wang, JJ, Ladbury, R, Buchner, S, Kim, H, Howard, J, Label, K, Phan, A, Irwin, T, Friendlich, M (2006) An analysis of Single Event Upsets dependencies on high frequency and architectural implementation within Actel RTAX-S family Field Programmable Gate Arrays. IEEE Transactions on Nuclear Science 53: pp. 3569-3574 CrossRef
  4. Rezgui, S., Won, R., Tien, J.: SET Characterization and Mitigation in 65-nm CMOS Test Structures. IEEE Transactions on Nuclear Science 59(4), August 2012
  5. Rezgui, S, Wang, JJ, Sun, Y, Cronquist, B, McCollum, J (2008) Configuration and routing effects on the SET propagation in Flash-based FPGAs. IEEE Transactions on Nuclear Science 55: pp. 3328-3335 CrossRef
  6. Wang, J.J., Kuganesan, G., Charest, N., Cronquist, B.: Biased-Irradiation characteristics of the floating gate switch in FPGA. In: IEEE Radiation Effects Data Workshop, pp. 101鈥?04 (2006)
  7. Battezzati, N., Gerardin, S., Manuzzato, A., Merodio, D., Paccagnella, A., Poivey, C., Sterpone, L., Violante, M.: Methodologies to Study Frequency-Dependent Single Event Effects Sensitivity in Flash-based FPGAs. IEEE Transactions on Nuclear Science 56(6, pt. 1), 3534鈥?541 (2009)
  8. Sterpone, L, Battezzati, N, Kastensmidt, FL, Chipana, R (2011) An Analytical Model of the Propagation Induced Pulse Broadening (PIPB) Effects on Single Event Transient in Flash-based FPGAs. IEEE Transactions on Nuclear Science 58: pp. 2333-2340 CrossRef
  9. Wang, J.J., Samiee, S., Chen, H.-S., Huang, C-K., Cheug, M., Borillo, J., Sun, S.N., Cronquist, B., McCollum, J.: Total ionizing dose effects on Flash-based Field Programmable Gate Array. IEEE Transactions on Nuclear Science 51(pt. 2), 3759鈥?766 (2004)
  10. Sterpone, L., Battezzati, N., Ferlet-Cavrois, V.: Analysis of SET Propagation in Flash-based FPGAs by means of Electrical Pulse Injection. IEEE Transactions on Nuclear Science 57(pt. 1), 1820鈥?826 (2010)
  11. Sterpone, L., Du, B.: Analysis and mitigation of single event effects on flash-based FPGAs. In: IEEE European Test Symposium, pp. 1鈥? (2014)
  12. Xu, W, Wang, J, Hu, Y, Lee, J-Y, Gong, F, He, L, Sarrafzadeh, M (2011) In-Place FPGA Retiming for Mitigation of Variational Single-Event Transient Faults. IEEE Transactions on Circuits and Systems 58: pp. 1372-1381 CrossRef
  13. Baze, MP, Buchner, SP, McMorrow, D (2000) A Digital CMOS Design Techniques for SEU hardening. IEEE Transactions on Nuclear Science 6: pp. 2603-2608 CrossRef
  14. Microsemi aa.vv., 鈥淯sing Synplify to Design in Microsemi Radiation-hardened FPGAs鈥? Application Note, AC139, p. 9 (2012)
  15. Sterpone, L., Battezzati, N.: On the mitigation of SET broadening effects in integrated circuits. In: IEEE 13th International Symposium on Design and Diagnostic of Electronic Circuits and Systems (DDECS), pp. 36鈥?9 (2010)
  16. Betz, V, Rose, J, Marquardt, A (1999) Architecture and CAD for Deep-submicron FPGAs. Springer, Boston CrossRef
  17. ProASIC3 Flash-based FPGAs, datasheet
  18. ITC 1999, ITC 1999 Benchmark home page, http://www.cerc.utecas.edulitc99-benchmarkslbench.html
  
• 作者单位：Applied Reconfigurable Computing
• 丛书名：978-3-319-16213-3
• 刊物类别：Computer Science
• 刊物主题：Artificial Intelligence and Robotics
  Computer Communication Networks
  Software Engineering
  Data Encryption
  Database Management
  Computation by Abstract Devices
  Algorithm Analysis and Problem Complexity
  
• 出版者：Springer Berlin / Heidelberg
• ISSN：1611-3349

文摘

Flash-based Field Programmable Gate Arrays (Flash-based FPGAs) are becoming more and more interesting for safety critical applications due to their re-programmability features while being non-volatile. However, Single Event Transients (SETs) in combinational logic represent their primary source of critical errors since they can propagate and change their shape traversing combinational paths and being broadened and amplified before sampled by sequential Flip-Flops. In this paper the SET sensitivity of circuits implemented in Flash-based FPGAs is mitigated with respect to the working frequency and different FPGA routing architecture. We outline a parametric routing scheme and placement and routing tools based on an iterative partitioning algorithm able to generate high performance circuits by reducing the wires delay and reducing the SET sensitivity. The efficiency of the proposed tools has been evaluated on a Microsemi Flash-based FPGA implementing different benchmark circuits including a RISC microprocessor. Experimental results demonstrated the reduction of SET sensitivity of more than 30% on the average versus state-of-the-art mitigation solutions and a performance improvement of about 10% of the nominal working frequency.